So with presentation on, I would try to pronounce it,
Sukkala, LA.
Yes, please welcome, Jan, with his talk.
Test test.
All right.
Thank you for coming.
So I'm going to present Sukkala,
which is an open source.
She was a 3-logic analyzer.
So I'm going to present myself.
Present the project.
Why is the project?
What are the specifications?
What I did so far and what next?
So I'm Yans Juno.
I'm a French guy from Granible.
And I'm a kernel and hypervisor engineer Advaits,
which is a French company making a hypervisor.
Completely open source based on Zen,
called the XCPNG.
Thanks.
I'm cheating a bit.
And the timing.
OK.
But this talk is not related to the base company.
It's just my own products.
So Sukkala, I've just said, it's a logic analyzer.
But what is a logic analyzer?
So this slide is just to explain that.
So this is the usual setup.
So a logic analyzer is the thingy on the left.
So it's a device that you connect on one end to your PC.
And on the other end, you've got probes, prob wires,
usually with colors that you plug on another device.
And the goal is to analyze what's going on in the other device.
So usually, you spin a software on your PC.
And you will be able to display what's going on on the wires
that you're probing, kind of like an oscilloscope,
but for digital signals.
So this is a tool for usually low-level embedded
developers to kind of debug one day
bringing up new hardware or debugging new hardware.
Or software drivers, for instance.
So as I said, it's a USB 3 device.
It's a FPGA-based.
That's a kind of chip.
And it is open-source.
But we are going back on this topic in the presentation.
So how is it pronounced?
Sukkala.
So it's just a bad play on words.
It is related to the company that is making a commercial
a logic analyzer called Sally Aight.
Yeah, so it's just a French play on words.
Don't worry about this.
So what's the goal of the project?
It is to make a reasonably fast, reasonably cheap,
an open-source logic analyzer.
So most open-source logic analyzers today
are usually kind of cheap, which is good.
But they are also usually slow in the use case that I like to use,
which is a real-time streaming.
You've got usually two ways of using logic analyzers.
Either the analyzer is going to sample the signals
and buffer them on the device in some kind of memory.
So it comes from a really fast and buffer in the memory,
but quickly the memory is full.
And then it has to stop sampling and send the data to the PC.
So in this configuration the problem is that you really
can sample for a small period.
So you can't capture for a long time.
So if you want to debug something that takes time to happen,
you can't do it or you can't do it easily.
So the streaming mode,
it's like the device is sampling the data and
sending them over to the PC at the same time.
And it's able to do it for long period of times.
Basically it could just do it forever.
It would just feel your computer ran.
So that's the, in my opinion, that's the use case that's the best
to debug stuff.
And when you're using USB 2.0,
you can't have high sample rates for real-time streaming.
So that's the problem I'm wanting to solve using USB 3.
So now let's focus on USB 3 solutions.
So I'm making a completely unfair comparison metrics table.
So the Sali AI, which is a big commercial logic analyzer,
it looked bad because there is already two-be-fair.
It is a really good device.
So it is pretty expensive.
It's really like $1500 solution.
It is close source, but it's really a good device.
There is the site it solution,
which just came out recently.
It is extremely cheap, $69.
But it is still kind of close source as well.
There is also the Dream Source Lab solution,
which is a bit in the middle, in terms of pricing.
But it's still close source.
And it's still great, which is what I'm trying to achieve.
So this is completely unfair comparison.
Everything is green, obviously, for my solution.
And the really the goal is to have kind of the same performances.
But be as open as possible.
And for the price, I don't know, we'll see.
And to not be too expensive, obviously.
So yeah, there are also already interesting projects
about USB 3 logic analyzer.
There is the FX3LAFW project,
which is an open source firmware for Cypress FX3 chips.
That you can use on your computer using your C-Glock or PulseView.
It does exist, but there is no open source board.
Open source hardware for it yet.
It's only supports the Cypress development kits,
which is kind of cheap, so it's good,
but it's not per se open source.
So you can check it out if you want.
So just to summarize, why is this project?
You've got fast devices already, but they are close source.
And the open source one usually are cheap and slow.
So let's try to change that.
So let's be more precise.
Open source, what does it mean here on this project?
It is a hardware project, so you have a printed secret board.
So the idea is that the hardware should be open source.
What does it mean?
It means that the design files are open.
They are on the Git repository, as well as the production files.
So that anybody could just take the file, open them,
modify them, learn from them,
and also just take them, not modify them,
and send them to production and get the device.
The PC software to control the device is open source.
And I'm just using the Cigroc project and the PulseU project,
which already exists and support many logic analyzers.
And yeah, it is open source.
There is the firmware, because there is firmware running on the device.
So there are many two chips on my project.
There is a micro controller, which is running a firmware.
So the firmware is a custom one.
And it is also on the Git repository.
And there is a second chip, which is an FPGA.
It behaves differently than a micro controller,
as it doesn't run per firmware, but it is configured
to behave like some kind of chip.
And so the HDL sources, the description of the hardware and the FPGA
is also open source.
It is based on the region.
It is written in the main general language.
And I'm using the LitX environment, which is a well-known open source
and environment to make a system on FPGA.
And also the tools.
Tools are pretty important, because you could have open source code for your FPGA.
But if you need to program your FPGA,
if you need a close source tools, that's not good.
So I've chosen the FPGA so that you could use the open source tool
from cover to cover.
So I'm using only Kiker, GCC, and XP, and I use this.
And you don't have to use any proprietary tool.
So I'm using open source hardware license.
The weak copy left one for the printed second ball,
for all the remaining part, LGPR.
So it should be fast, as I said, USB3.
So you could have like 400 mega samples per second
and some probes to be comparable with the other solutions.
And as I said, one of the big feature I like is real time streaming on the LGPR.
So I'm focusing on real time streaming.
There is no buffer on the device.
And I'm just doing real time streaming.
And one of the ideas I have in mind is to be extensible.
So because I'm pretty sure that I'm trying to do something,
I will reach some point with some features.
But the idea is that someone should be able to improve upon it.
To take the project, say, oh, he did it like this.
But we can do better, we can modify, et cetera.
So the idea, I'm using the FPGA because it truly modular.
You can modify it, easily add elements in the pipeline
to do, I don't know, some computing, run live encoding or filtering whatever you want.
I'm using a language that is easy to read and to learn and easy to modify
because it's a Python-based language to describe the FPGA.
So it's easy to read.
And I'm reusing already known components.
So I'm not re-inventing the wheel so that, so yeah, it's a known ecosystem.
Thank you.
So I'm using lightx.
And the architecture is as simple as possible.
So what has been done so far?
So the first prototype is this kind of mess.
So it's basically just two already existing boards.
On the left, you've got an FPGA development board, which is a nice one.
It's the orange crab.
And on the right, it's a hydro USB-3 board.
It's a board featuring the mic for controller I'm using.
And it is here just to provide USB-3 connection.
So I'm just wiring together those two boards, and that is the first prototype.
Second prototype, the idea was just to replace the orange crab, the FPGA part,
and to reuse the blue board, the USB-3 board.
So I'm not tackling all the problems at the same time.
So I designed the board, the FPGA board, the green one,
so that you can plug it underneath the USB-3 board.
So that's the second prototype that allow to just get rid of the messy wiring.
And I've just received the printed SQL board for the third prototype,
and the bring-up has barely started.
And so the idea of the third prototype is to have everything on one single board.
So you've got the microcontroller on the middle and the FPGA right next to it,
and there is just one board.
So this is just 3D rendering.
Let me just explain basically how things work.
So you've got the connectors on the right.
That's where you plug the sampling wire, the probes.
So the data is coming from the right.
It's entering the board.
It's going through the divider and ESD protection.
Then it's entering the FPGA, which is sampling the data.
It goes down a pipeline, which I will describe inside the FPGA.
Then the FPGA is sending the data to the microcontroller using HSPI.
And the role of the microcontroller is just to send data over USB 3 to the computer.
That's basically it.
You've got the bottom of the board.
And that's a picture of the actual board assemble.
So that's the real thingy.
It was nice to work and assembly it with a dog who is in the room.
And so also there is the software part on your computer.
When you plug the logic analyzer, you need to be able to use it.
So I'm using Perseview and Cigrox.
So the support is already developed.
And it's already working.
So this is a screenshot of Perseview capturing a serial data using the device.
At a 128 mega sample spec and it's showing debug text.
That's the computer host part.
So let's focus a bit on the FPGA pipeline.
It's quite simple.
So this data is coming from the left.
You've got the probe inputs.
There is an over simpler to just use a simple data.
Normally via DDR or twice or four per clock cycle.
There is a hardware trigger mechanism.
There is a sub simpler because maybe you want to drop samples.
You don't want to, you have no use of something at 100 megahertz.
Maybe you just need to dump sample.
And then there is packet buffer and the HSPI transmitter to transmit to the microcontroller.
And now let's talk about the microcontroller firmware.
Its call is really simple.
It's just to get data from the FPGA.
Send it over to the PC via USB 3.
And it also acts as a bridge between the host PC and the FPGA to send a register reads and write from the host PC to be able to start a capture, stop a capture, configure a capture etc.
And also it is there to program the FPGA from the USB stream from the PC.
And to have serial debugger logs.
This is a scheme, a diagram of the whole situation for the FPGA on the right, the microcontroller on the left.
So you see the probes on the right.
It goes down the pipeline in the FPGA and it goes to HSPI on the MCU and USB 3 to the PC.
And the URL link to configure the FPGA SOC.
And so you see the diagram of the SOC.
So what's next, bring up of the new board.
Improved driver, the documentation, bring up new features.
Make HSPI go faster, program the FPGA of a USB, maybe Render Syncoding,
Lipscopal, lots of stuff to do.
Thank you.
Here are the link to the Git repository.