ThinkPad X200: flashing tutorial (BeagleBone Black)

# Flashing the X200 with a BeagleBone Black

Initial flashing instructions for X200.

This guide is for those who want libreboot on their ThinkPad X200 while they still have the original Lenovo BIOS present. This guide can also be followed (adapted) if you brick your X200, to know how to recover.

The X200S is also briefly covered (image showing soldering joints, wired up to a BBB). Note, not all X200S or X200 Tablet configurations are supported yet (see ../hcl/x200.html#x200s

Before following this section, please make sure to setup your libreboot ROM properly first. Although ROM images are provided pre-built in libreboot, there are some modifications that you need to make to the one you chose before flashing. (instructions referenced later in this guide)

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# Flash chips

There are two possible flash chip sizes for the X200: 4MiB (32Mbit) or 8MiB (64Mbit). This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8 (8 pins), 8MiB is SOIC-16 (16 pins). The X200S uses a WSON package and has the same pinout as SOIC-8 (covered briefly later on in this guide) but the chip is on the underside of the board (disassembly required).

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# Initial BBB setup

Refer to bbb_setup.html for how to setup the BBB for flashing.

The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252):

    POMONA 5252 (correlate with the BBB guide)
    ===  front (display) on your X200 ====
     NC              -       - 21
     1               -       - 17
     NC              -       - NC
     NC              -       - NC
     NC              -       - NC
     NC              -       - NC
     18              -       - 3.3V PSU RED
     22              -       - NC - this is pin 1 on the flash chip
    ===  back (palmrest) on your X200 ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250):

    POMONA 5250 (correlate with the BBB guide)
    ===  left side of the X200 (where the VGA port is) ====
     18              -       - 1
     22              -       - NC
     NC              -       - 21
     3.3V PSU RED    -       - 17 - this is pin 1 on the flash chip. in front of it is the screen.
    ===  right side of the X200 (where the audio jacks are) ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
    Here is a photo of the SOIC-8 flash chip: images/x200/soic8.jpg
    (image copyright 2015 Patrick "P. J." McDermott <pj@pehjota.net>, CC BY-SA 3.0 or later)

    Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16
    chip on those pins?

On the X200S the flash chip is underneath the board, in a WSON package. The pinout is very much the same as a SOIC-8, except you need to solder (there are no clips available). images/x200/wson_soldered.jpg (image copyright (C) 2014 Steve Shenton under CC-BY-SA 4.0 or higher, same license that this document uses) shows it wired (soldered) and connected to a BBB.
In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead. Check the list of SOIC-8 flash chips at ../hcl/x200_remove_me.html#flashchips but do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case, the X201 SOIC-8 flash chip (Macronix 25L6445E) might work.

## Connect Pomona 5252/5250 to the X200 flash chip, and dump/flash

images/x200/x200_pomona.jpg shows everything connected. In this picture, the X200 is being flashed with the BBB.

Remove the battery from your X200, then remove all the screws on the bottom (underside) of the machine. Then remove the keyboard and palmrest. The flash chip is below the palm rest. Lift back the tape that goes over it, and then connect your 5252/5250 (make sure to get it the right way round). Then connect the 3.3v PSU wire (red one) and make sure that everything else is connected.

I did (SSH'd into the BBB):
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
In my case, the output was:

    flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
    flashrom is free software, get the source code at http://www.flashrom.org
    Calibrating delay loop... OK.
    Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
    Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
    Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
    Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
    Please specify which chip definition to use with the -c <chipname> option.

This is just to test that it's working. In my case, I had to define which chip to use, like so (in your case it may be different, depending on what flash chip you have):
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c "MX25L6405(D)"

At this point, you need to create a copy of the original lenovo firmware that is currently flashed. This is so that you can extract the gbe (gigabit ethernet) and flash descriptor regions for use in libreboot. These are not blobs, they only contain non-functional data (configuration details, fully readable) which is fully documented in public datasheets. The descriptor will need to be modified to disable the ME (also disable AMT) so that you can flash a ROM that excludes it.

How to backup factory.rom (change the -c option as neeed, for your flash chip):
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c "MX25L6405(D)" -r factory.rom
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c "MX25L6405(D)" -r factory1.rom
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c "MX25L6405(D)" -r factory2.rom
Now compare the 3 images:
# sha512sum factory*.rom
If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another machine, not the BBB). You will need it later for part of the deblobbing.

Information about the descriptor, gbe regions and how the ME was removed can be found in the notes linked at ../hcl/x200_remove_me.html. Libreboot ROM images now include the 12KiB descriptor+gbe by default, generated using ich9gen; however, do note that the MAC address in the Gbe region is generic. Follow the instructions at ../hcl/x200_remove_me.html#ich9gen and do what it says to change the MAC address inside your X200 ROM image, before flashing it.

Assuming that your libreboot ROM image is properly setup (modified descriptor plus gbe region included in the ROM), then you can flash (assuming that the filename is libreboot.rom) for example I had to do:
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c "MX25L6405(D)" -w libreboot.rom

You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot. Test it! (boot your X200)

My output when running the command above:

    flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
    flashrom is free software, get the source code at http://www.flashrom.org
    Calibrating delay loop... OK.
    Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
    Reading old flash chip contents... done.
    Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
    ERASE FAILED!
    Reading current flash chip contents... done. Looking for another erase function.
    Erase/write done.
    Verifying flash... VERIFIED.

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Copyright © 2014, 2015 Francis Rowe <info@gluglug.org.uk>
This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. A copy of the license can be found at ../license.txt.

This document is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See ../license.txt for more information.